Layouts with Wires of Balanced Length

نویسندگان

  • Bernd Becker
  • Hans-Georg Osthof
چکیده

For any graph G with fixed boundary there exists a layout in the plane, which minimizes the maximum Euclidean distance of any node to its neighbors. This layout balances the length of the graph edges and is therefore called a (length-) balanced layout of G. Furthermore the existence of a unique optimal balanced layout L with the following properties is proved: (i) L is the minimal element of an order defined on the set of layouts of a graph with fixed boundary. (ii) L may be constructed as the limit of the /,-optimal layouts L,, of G. (iii) If G is a planar graph with fixed boundary, then the optimal balanced layout L of G is quasi-planar.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Layout of the Cube-connected Cycles without Long Wires

Preparata and Vuillemin proposed the cube connected cycles CCC in and in the same paper gave an asymptotically optimal layout scheme for the CCC While all the known optimal layouts including the Preparata Vuillemin layout of the CCC have long wires we give a new layout scheme which has no long wires while keeping the asymptotically optimal area Hence we can conclude that the CCC can be laid out...

متن کامل

Minimizing total wire length during 1-dimensional compaction

Minimizing the total wire length is an important objective in VLSI layout design. In this paper we consider the problem of minimizing the total wire length during I-dimensional (I-D) compaction. Assume we are given a layout. containing nh horizontal wires, nlJ vertical wires, and rectilinear polygonal layout. components c.omposed of 7lr vertical edges. We present an O(n/, ·nlogn) time algorithm...

متن کامل

The Effect of Six-Legged Concrete Elements on Hydraulic Jump Characteristics

In the present study, the six legged concrete (SLC) elements are placed at the bed of a flume downstream of a chute in different layouts, densities and number of longitudinal rows of SLC elements. Each test was run for different flow conditions (Froude numbers ranged 5.3 to 8.1). During each test, the water surface profile, the roller length and the jump length measured.  Applying the experimen...

متن کامل

A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem

Abstract Antenna problem is a phenomenon of plasma induced gate oxide degradation. It directly affects manufacturability of VLSI circuits, especially in deep-submicron technology using high density plasma. Diode insertion is a very effective way to solve this problem. Ideally diodes are inserted directly under the wires that violate antenna rules. But in today’s high-density VLSI layouts, there...

متن کامل

Optimal three-dimensional layout of interconnection networks

The main bene1ts of a three-dimensional layout of interconnection networks are the savings in material (measured as volume) and the shortening of wires. The result presented in this paper is a general formula for calculating a lower bound on the volume. Moreover, for butter3y and X-tree networks we show layouts optimizing the maximum wire length and whose upper bounds on the volume are close to...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:
  • Inf. Comput.

دوره 73  شماره 

صفحات  -

تاریخ انتشار 1985